http://neural-semiconductor.com/wp-content/uploads/2018/12/neural-semiconductor-logo-300x94.png 0 0 Quazi Md Mohebur Rahman http://neural-semiconductor.com/wp-content/uploads/2018/12/neural-semiconductor-logo-300x94.png Quazi Md Mohebur Rahman2021-02-11 15:56:442021-02-11 15:56:44ASSOCIATE ENGINEER (TRAINEE) – DIGITAL VERIFICATION
- Functional verification with industry-standard methodologies.
- Understanding specs and create a verification test plan.
- Creating a SystemVerilog Layered approach or UVM/OVM based Testbenches.
- Understanding problem statements and implements them as per guidance.
- Working with RTL Engineers for better understanding and implement the verification.
Qualification & Competencies
- B.Sc. in EEE or CSE.
- Quick learning and analytical ability.
- Proficiency any of the following programming languages: Verilog, C, C++, Bash, Python.
- Knowledge on Shell Scripting is a plus.
- Processor Design or VLSI related course work and project experience.
- Having knowledge on Verilog, SystemVerilog would fasten your learning process.
- Fundamental knowledge on these protocols I2C, APB, SPI, etc. and verification methodologies.
- Having experience with UVM/OVM and System C is a Plus.
- Having experience with verification using industry standard EDA tools is a Plus.
Application Process: Please submit your resume to firstname.lastname@example.org